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  |
  |      6510 CPU ILLEGAL INSTRUCTION SET
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  |
  |  Related topics:
  |
  |   6510 instruction set
  |   6510 instruction chart
  |
  |   65816 extended instruction set
  |   65816 instruction chart
  |
  |   6510/65816 Addressing modes
  |
  |  Instructions set:
  |
  |     ANC   AND #immediate, copy accu-bit 7 to carry
  |     ANE   Instable!
  |     ARR   AND #immediate, ROR accu
  |     ASR   AND #immediate, LSR accu
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  |     DCP   DEC memory, CMP memory
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  |     ISB   INC memory, SBC memory
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  |     JAM   Locks up machine
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  |     LAE   Instable!
  |     LAX   LDA memory, TAX
  |     LXA   Instable!
  |
  |     NOP   No operation
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  |     RLA   ROL memory, AND memory
  |     RRA   ROR memory, ADC memory
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  |     SAX   Accu AND X-Register into memory
  |     SBC   Subtract memory from accumulator with borrow
  |     SBX   Accu AND X-Register, subtract operand, result into X-Register
  |     SHA   Instable!
  |     SHS   Instable!
  |     SHX   Instable!
  |     SHY   Instable!
  |     SLO   ASL memory, ORA memory
  |     SRE   LSR memory, EOR memory
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