6510/65816 Addressing mode: Zeropage/Direct -- d (ADC,AND,BIT,CMP,CPX,CPY,EOR,LAX,LDA,LDX,LDY,NOP,ORA,SAX,SBC,STA,STX, STY,STZ) (2 bytes) (3,4 and 5 cycles) +---------------+------------------+-----------------------+----------+ | Cycle | Address Bus | Data Bus |Read/Write| +---------------+------------------+-----------------------+----------+ | 1 | PBR,PC | Op Code | R | | 2 | PBR,PC+1 | Direct Offset | R | | (2) 2a | PBR,PC+2 | Internal Operation | R | | 3 | 0,D+DO | Data Low | R/W | | (1) 3a | 0,D+DO+1 | Data High | R/W | +---------------+------------------+-----------------------+----------+ (1) Add 1 cycle for M=0 or X=0 (i.e. 16 bit data). (2) Add 1 cycle for direct register low (DL) not equal 0. See also: Abbreviations |