6510/65816 Addressing mode: Absolute Indexed -- a,x  a,y

 (ADC,AND,BIT,CMP,EOR,LAE,LAX,LDA,LDX,LDY,NOP,ORA,SBC,SHA,SHS,SHX,SHY,
  STA,STZ)
 (3 bytes)  (4,5 and 6 cycles)

    +---------------+------------------+-----------------------+----------+
    |     Cycle     |   Address Bus    |       Data Bus        |Read/Write|
    +---------------+------------------+-----------------------+----------+
    |           1   |  PBR,PC          | Op code               |    R     |
    |           2   |  PBR,PC+1        | Absolute Address Low  |    R     |
    |           3   |  PBR,PC+2        | Absolute Address High |    R     |
    |       (4) 3a  |  DBR,AAH,AAL+IL  | Internal Operation    |    R     |
    |           4   |  DBR,AA+I        | Data Low              |   R/W    |
    |       (1) 4a  |  DBR,AA+I+1      | Data High             |   R/W    |
    +---------------+------------------+-----------------------+----------+
    (1) Add 1 cycle for M=0 or X=0 (i.e. 16 bit data).
    (4) Add 1 cycle for indexing across page boundaries, or write, or X=0.
        When X=1 or in the emulation mode, this cycle contains invalid
        addresses.

    See also: Abbreviations