Branch penalty cycles
 +---------------------+

 As you can see from the relative addressing mode, the relative offset is
 added to the PC after it has been fetched, of course. That means, that the
 penalty cycle for branching to a different page is given, if the branch
 is taken and the high byte of the PC after the branch instruction is
 different from the high byte of the destination address.

 The syntax of assemblers may lead to confusion here. For example, "BCS *+2"
 looks like an offset has to be added, but it will be coded as "B0 00", so
 this instruction will never branch to a different page.

 The 65816 applies this penalty cycle only in Emulation mode.